1 ps8560b 11/13/08 pin configuration (pi49fct20802) features ? high frequency >150 mhz ? high-speed, low-noise, non-inverting clock buffer ? pi49fct20802 is a 1:5 buffer ? pi49fct20803 is a 1:7 buffer ? low skew < 150ps ? low duty cycle distortion < 300ps ? low propagation delay < 3.5ns ? multiple v dd , gnd pins for noise reduction ? 2.5v supply voltage and 3v tolerant input ? packages (pb-free & green): - 16-pin tssop (l) - 16-pin qsop (q) 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 1:5/1:7 2.5v clock buffer for networking applications pi49fct20802/ pi49fct20803 description the pi49fct2080x is 2.5v, high-speed, low noise, non-inverting clock buffer. it is designed to target networking applications that require low-skew, low-jitter, and high-frequency clock distribution. it provides output-to-output skew as low as 150ps, and is an ideal clock distribution device for synchronous systems. pi49fct2080x is a clock buffer from a single input that produces five outputs on pi49fct20802 and seven outputs on pi49fct20803. pi49fct2080x is characterized for operation from ?40 c to 85 c. 1 2 3 v dd 4 clk1 5 clk0 6 nc 7 v dd 8 gnd v dd clk3 gnd v dd nc gnd 16 15 14 13 12 11 10 9 buf_in gnd clk2 clk4 clk4 clk2 clk1 clk0 buf_in clk3 pin configuration (pi49fct20803) 1 2 3 v dd 4 clk1 5 clk0 6 clk2 7 v dd 8 gnd v dd clk5 gnd v dd clk3 gnd 16 15 14 13 12 11 10 9 buf_in gnd clk4 clk6 clk6 clk2 clk1 clk0 buf_in clk3 . . . block diagram (pi49fct20802) block diagram (pi49fct20803) 08-0298
2 ps8560b 11/13/08 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 pi49fct20802/pi49fct20803 1:5/1:7 2.5v clock buffer for networking applications storage temperature ..................................... ?65c to +150c supply voltage v dd .................................................. ?0.5v to +3.6v input/output voltages (1) ................................ ?0.5v to v dd +0.5v dc output current ...................................... ?60ma to +60ma power dissipation ....................................................... 500mw maximum ratings (above which the useful life may be impaired. for user guidelines, not tested.) note: stresses greater than those listed under maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. notes: 1. this value is limited to 3.6v maximum. 2. for max. or min. conditions, use appropriate value specified under electrical characteristics for the applicable device type. 3. typical values are at v dd = 2.5v, +25c ambient and maximum loading. sretemara pn oitpircse ds noitidnoctset )2( .ni m. pyt )3( .xa ms tinu v hi egatlovhgihtupn i7 .1 v v li egatlovwoltupni 7.0 i i tnerructupn iv dd vro0= dd 1 ma v ki egatlovedoidpmal cv dd i,.nim= ni am81? =7 .0 ?1 ? v v ho hgihtuptuo egatlov v dd .nim =i ho am1? =2 i ho am8? =8 .1 )3( v lo egatlovwoltuptu ov dd .nim =i lo am1 =4 .0 i lo am8 =6 .0 dc electrical characteristics (over the operating range) operating range v dd voltage ........................................................... 2.5v 0.2v industrial temperature .................................... ?40c to +85c commercial temperature ..................................... 0c to +70c capacitive loading ............................................. 10pf to 25pf 08-0298
3 ps8560b 11/13/08 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 pi49fct20802/pi49fct20803 1:5/1:7 2.5v clock buffer for networking applications notes: 4. for max. or min. conditions, use appropriate value specified under electrical characteristics for the applicable device. 5. typical values are at v dd = 2.5v, +25c ambient and maximum loading. 6. per ttl driven input (v in = v dd ? 0.6v); all other inputs at v dd or gnd. capacitance (t a = 25c, f = 1 mhz) note: 7. this parameter is determined by device characterization but is not production tested. sretemara pn oitpircse ds noitidnoctset )4( .ni m. pyt )5( .xa ms tinu i qdd tnerrucylppusrewoptnecseiu qv ni vro0= dd 1. 00 2 a i dd stupnireptnerrucylppu sv ni v= dd v6.0? )6( 7 40 03 i dd )1hpargees(tnerrucylppuscimany dv dd ,daolmho-33&fp51,v7.2= zhm051=f 63 1a m power supply characteristics graph 1. dynamic current vs. clock frequency 160 140 120 100 80 60 clock frequency [mhz] dynamic current - i dd [ma] 40 20 0 0 50 100 150 200 load = 15pf & 33 ohms load = 0 sretemara pn oitpircse ds noitidnoctse tp yt )7( .xa ms tinu c ni ecnaticapactupn iv ni v0 =34 fp c tuo ecnaticapactuptu ov tuo v0 =6 08-0298
4 ps8560b 11/13/08 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 pi49fct20802/pi49fct20803 1:5/1:7 2.5v clock buffer for networking applications notes: 8. see test circuit and waveforms. 9. identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade. sretemara pn oitpircse ds noitidnoctset )8( .ni m. py t. xa ms tinu f klc ycneuqerftuptuo 05 1z hm t r t/ f vemitllaf/esir o v7.1~v7.0= c l zhm001,fp22 =0 . 15 2.1 sn c l zhm051,fp21 =0 . 12 .1 t dp yalednoitagaporp c l zhm001,fp22 =5 . 35 .3 c l zhm051,fp21 =4 . 27 .2 t )o(ks wekstuptuo c l zhm001,fp22 =0 0 10 51 sp c l zhm051,fp21 =0 0 10 51 t )p(ks wekseslup c l zhm001,fp22 =0 5 20 03 c l zhm051,fp21 =0 5 20 03 t )d(ks weksecived-ot-ecived )9( c l zhm051,fp21 =0 0 40 06 switching characteristics (v dd = 2.5v 0.2v, t a = 85c) test circuits for all outputs pulse generator d.u.t. v in v out c l v dd emannip noitpircsed 20802tcf94i p3 0802tcf94ip ni_fu bn i_fu bt upni ]4:0[kl c] 6:0[kl cs tuptuo dn gd n gd ng v dd v dd rewop product pin description 08-0298
5 ps8560b 11/13/08 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 pi49fct20802/pi49fct20803 1:5/1:7 2.5v clock buffer for networking applications switching waveforms propagation delay package skew ? t sk(t) pulse skew ? t sk(p) output skew ? t sk(o) input t plhx 3v 1.5v 0v clkx v oh 1.5v v ol t phlx t sk(o) clky v oh 1.5v v ol t sk(o) t plhy t phly t sk(o) = t plhy ? t plhx or t phly ? t phlx input t plh1 3v 1.5v 0v package 1 output v oh 1.5v v ol t phl1 t sk(t) package 2 output v oh 1.5v v ol t sk(t) t plh2 t phl2 t sk(t) = t plh2 ? t plh1 or t phl2 ? t phl input t plh 3v 1.25v 0v output v oh 1.25v v ol t phl 2.0v 0.6v t r t f input t plh 3v 1.5v 0v output v oh 1.5v v ol t phl t sk(p) = | t phl ? t plh | 08-0298
6 ps8560b 11/13/08 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 pi49fct20802/pi49fct20803 1:5/1:7 2.5v clock buffer for networking applications 1 description: 16-pin, 173-mil wide, tssop package code: l document control no. pd - 1310 revision: e date: 03/09/05 note : 1. package outline exclusive of mold flash and metal burr 2. controlling dimentions in millimeters 3. ref: jedec mo-153f/ab pericom semiconductor corporation 3545 n. 1st street, san jose, ca 95134 1-800-435-2335 ? www.pericom.com .193 .201 .047 max. .002 .006 seating plane .0256 bsc .018 .030 .004 .008 .252 bsc 1 16 .169 .177 0.05 0.15 6.4 0.45 0.75 0.09 0.20 4.3 4.5 1.20 4.9 5.1 0.65 0.19 0.30 .007 .012 packaging mechanical: 16-pin tssop (l) 08-0298
7 ps8560b 11/13/08 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 pi49fct20802/pi49fct20803 1:5/1:7 2.5v clock buffer for networking applications 1 .189 .197 .053 .069 .004 .010 seating plane .025 bsc .007 .010 .228 .244 1 16 .150 .157 x.xx x.xx denotes dimensions in millimeters 0.635 4.80 5.00 1.35 1.75 5.79 6.19 0.101 0.254 .008 .012 0.203 0.305 3.81 3.99 0.178 0.254 0.38 .008 0.203 .015 x 45 ref detail a detail a .008 0.20 min. guage plane .010 0.254 .041 1.04 ref .016 .035 0.41 0.89 ? ? .008 .013 0.20 0.33 description: 3 l q 0 l o wide qsop package code: q document control no. 3 ' revision: g date: 11/07/07 note: 1) controlling dimensions in inches. 2) ref: - ( ' ( & 0 2 % $ % 3) dimensions do not include mold flash, protrusions or gate burrs pericom semiconductor corporation 3545 n. 1st street, san jose, ca 95134 ? www.pericom.com pericom semiconductor corporation ? 1-800-435-2336 ? http://www.pericom.com ordering information ordering code package code package description pi49fct20802qe q pb-free & green, 16-pin 150-mil wide qsop pi49fct20802le l pb- free & green, 16-pin 173-mil wide tssop pi49fct20803qe q pb-free & green, 16-pin 150-mil wide qsop pi49fct20803le l pb- free & green, 16-pin 173-mil wide tssop notes: 1. thermal characteristics can be found on the company web site at www.pericom.com/packaging/ packaging mechanical: 16-pin qsop (q) 08-0298
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